Scalable, Reconfigurable, and Dependable Time-Triggered Architecture

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Objective

As part of the Darpa NEST program, developed hierarchically structured version of the Time-Triggered Architecture (TTA) that will scales to many thousands of nodes.

TTA is an architecture for embedded control systems that is being adopted by both the automobile and aviation industries: it has the unique advantage of combining the low cost of mass-produced automobile technology with the ultra-high dependability and assurance of aviation products.

Team

Our team comprises

The Formal Methods Program of SRI, the world leader in formal verification technology, led by John Rushby
TTTech of Vienna, Austria, the developers of TTA
The Real-Time Systems Group of the Department of Computer Sciences, The University of Texas at Austin, led by Professor Aloysius K. Mok

Slides from PI meetings

Slides from Kickoff meeting (Napa, June 2001: gzipped postscript or pdf

Darpa Charts

Quadchart: gzipped postscript or powerpoint

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