In this paper, we provide a practical transformational approach
to the synthesis of correct synchronous digital
hardware designs from high-level specifications. We do this
while taking into account the complete life cycle of a design
from early prototype to full custom implementation.
Besides time-to-market, both flexibility with respect to target
architecture and efficiency issues are addressed by the
methodology. The utilization of user-selected behaviorpreserving
transformation steps ensures first-time-right
designs while exploiting the experience, flexibility, and
creativity of the designer.
To ensure that design transformations are indeed behavior-
preserving a novel mechanized approach to the
specification and verification of design transformations on
control data flow graphs which is independent of a specific
behavioral model or graph size has been developed.
As a demonstration of an industrial application we use a
video processing algorithm needed for the conversion from a
line-interlaced to progressively scanned video format. Both
a video signal processor-based prototype implementation as
well as a very efficient full custom implementation are developed
starting from a single high-level behavioral
specification of the algorithm in VHDL. Results are compared
with those previously obtained using different tools
and methodologies.
R&D Divisions